Switching mode inverter-type power supplies are used to convert direct current power into high voltage alternating current power which may be subsequently rectified and used for energizing electronic equipment such as computers, data processors, and the like. Such inverters operate on the principle of cyclically storing electrical energy from an appropriate source in an electromagnetic storage device, such as a transformer, and releasing the power from the electromagnetic device into the load.
Switching mode inverters, in general, appear in the prior art as push-pull circuits incorporating power switching transistors which are alternately turned on to provide a high voltage alternating current output with a rectangular waveform. The rectangular waveform of the alternating current output is usually modified, however, by reducing the duty cycle to below 100%, so as to prevent cross-conduction during the storage time of the transistor being turned off, and also to produce some means for regulating the output voltage by controlling the duty cycle.
It has characteristically been necessary to provide the aforesaid dead time interval, which is usually fixed, between the conductive intervals of the switching transistors so as to prevent conduction from one of the switching transistors directly through the other during the storage time of the transistor being turned off. These so-called through currents cause high stress and frequent failure of the switching transistors, as pointed out above.
The necessity of providing an adequate dead time interval between the conductive modes of the switching transistors in order to prevent through currents imposes a significant limit on the usual prior art switching mode power supplies, as the maximum duty cycle is typically reduced by 25% or more. This is mainly because the storage time is longer at light loads than at heavy loads, so that a dead time must be allowed. At heavy loads, the reduction in storage time further reduces the effective duty cycle. When allowance is made for variations from one transistor to another, it is rarely possible in the prior art systems to achieve more than a 75% overall duty cycle at frequencies over 20 KHz.
The need for an effective duty cycle control is, therefore, well recognized in the art, and various prior art circuits have been implemented. These prior art circuits, in general, use some form of feedback from the output circuit to indicate when turn-off has been completed. An example of such a circuit configuration is used in the Ferranti electric integrated circuit controller ZN1066, and is described in the application notes for that paticular device. A troublesome problem with the system described in the Ferranti article, however is that the output waveform of the power transformer in in general has a large amount of ringing associated with operation at certain power levels, and as the load power varies over the allowable range, the amplitude and timing of this ringing will vary substantially, preventing reliable use of this signal.
The overlap control system of the present invention includes a memory element in the control circuit to prevent output voltage instability which could cause failure of the switching transistors. The memory element, in the embodiment to be described, consists of a reset type of flip-flop which is included in the control system, and which is set by a particular signal. The flip-flop remains set so long as the particular signal is present, regardless of the status of the output voltage of the power supply, and while set, the flip-flop prevents turn-on of the other switching transistor. The particular signal is obtained from the output of the power supply, and it holds the related reset signal off so long as output from the active side is present. This includes the storage time of the switching transistor, so that the memory element prevents turn-on of the opposite side during the storage interval. When the storage interval ends, the output voltage goes to zero in reversing, and in so doing resets the flip-flop. When the flip-flop is reset, the opposite side of the control system can turn on at any time. In brief, the end of the storage interval ends the function of the overlap control system, so that the inverter control system can initiate turn-on on the opposite side immediately, regardless of the actual voltage appearing at the output due to ringing or overshoot.
In the system to be described, the overlap control circuit of the invention is embodied as part of an overall drive system for a high power inverter, such as described and claimed in Copending application Ser. No. 342,466 filed Jan. 25, 1982 which issued May 17, 1983 as U.S. Pat. No. 4,384,320. Two flip-flops are used in the system, one for each side of the inverter, and the output signals from the flip-flops are gated together so that an on signal from either flip-flop will inhibit turn-on of the drive system. As the drive system itself always selects the opposite side at turn-on, the end of the storage period of one transistor immediately enables the turn-on of the other. Therefore, the output voltage controller can vary the effective duty cycle up to 100%, regardless of actual storage time of the particular switching transistors used in the inverter.
The increase in the usual duty cycle in inverter-type power supplies using the overlap control circuit of the present invention is from 75%-100%. This, by itself, increases the useful output power of the inverter without significant increase in losses, and most of the losses result from the switching action itself, and are not related to the duty cycle in any substantial manner. The inclusion of the flip-flops is essential in achieving this power increase without introducing additional failure modes or output instability.